Testing fabricated integrated circuits (ICs) to identify defects and determine proper operation has always been a difficult problem. IC manufacturers must detect and correct such defects before shipping large numbers of parts to customers to avoid a costly recall.
IC defects occur in two major categories. Design defects arise when the design of an IC is incapable of performing the function for which the IC is intended. ICs properly manufactured according to a defective design nonetheless function defectively. Design defects affect every IC until the design itself is changed. A manufacturing defect involves some fault in the manufacture of the IC and typically affects fewer than all parts manufactured. Such defects are corrected by identification and correction of the manufacturing fault.
Most IC manufacturers test ICs for proper function before shipping them to customers. With the increase in IC complexity this testing becomes increasingly difficult. Rather than rely on increasingly expensive external testing devices, many manufacturers have begun to test ICs using a technique called “built-in self-test” (BIST). BIST uses circuitry that co-exists on the same substrate as an IC to test the IC. When triggered either automatically in circuit operation or by an external test device, the BIST circuitry produces a set of test conditions that run on other, ordinary IC circuitry. Comparison of the state of the IC following test to an expected state indicates whether the IC passed the test. An example of such a test is writing to a read-write memory and recalling the data written. A match between the data written and the data read results in passing the test.
BIST typically involves other more complex tests and relies on an external test bus to report results to the external test device. Popular external test bus standards include the well-known Inter-Integrated Circuit, or I2C, bus. BIST is therefore a process of loading test instructions or data from the external test device to BIST circuitry via the external test bus, causing the BIST circuitry to conduct tests and reading test results via the external test bus.
While an external test bus provides satisfactory speeds for loading the test data and reading the test results, an improvement in testing speed, without sacrificing completeness or accuracy, is desired. What is needed in the art is a faster way to test an IC such that IC defects can be detected more effectively.